Search results Search for: Search Refine your results by duration: Any Under 5 mins Under 20 mins Over 20 mins Sort by: Relevance Views Date X13 Pre-Release Update featuring 4th Gen Intel® Xeon® Scalable Processors Bill Chen, GM, System Product Management, Supermicro; Gary Brown Sr Product Marketing PM, Xeon & Memory Group, DCAI, Intel® Join us for an exciting and informational preview of the broadest range of next-generation systems optimized for tomorrow’s data center workloads, P... 2 weeks ago | 25 mins The History of PCI IO Technology: 30 Years of PCI-SIG® Innovation Dr. Debendra Das Sharma, PCI-SIG Board Member For the past 30 years, PCI-SIG® has delivered IO technologies and specifications that move the technology industry forward and has grown to over 900 m... 5 months ago | 61 mins Preparing for PCIe 6.0 Stephane Hauradou, Product Marketing (PLDA) - Gordon Allan, Product Manager for Verification IP (Siemens EDA) As the need for data has exploded driven by applications like AI/ML and automotive, the semiconductor industry, led by PCI-SIG, is preparing for the f... 1 year ago | 35 mins Selection and Implementation of a PCIe 5.0 Subsystem Malini Narayana Moorthi Director of Applications Engineer & Vinitha Seevaratnam Sr. Product Marketing Manager The latest generation of the PCI Express, PCIe 5.0, advances performance to 32 GT/s in support of advanced applications including 400G Ethernet. In th... 1 year ago | 21 mins Retimers to the Rescue: PCI Express® Specifications Reach Their Full Potential Kurt Lender, Intel and Casey Morrison, Astera Labs As PCI Express® (PCIe®) specifications continue to double the transfer rates of previous generations, the technology can address a variety of needs fo... 3 years ago | 60 mins PCIe® 6.0 Specification: The Interconnect for I/O Needs of the Future Debendra Das Sharma, PCI-SIG Board Member, Intel PCI Express® (PCIe®) architecture has provided the I/O connectivity for computing, communication, and storage platforms satisfying the power-efficient... 2 years ago | 60 mins PCIe® 6.0 Specification: The Interconnect for I/O Needs of the Future Debendra Das Sharma, PCI-SIG Board Member, Intel PCI Express® (PCIe®) architecture has provided the I/O connectivity for computing, communication, and storage platforms satisfying the power-efficient... 2 years ago | 67 mins Integrity and Data Encryption (IDE) ECN Deep Dive David Harriman, Protocol Work Group Chair, Intel Developers must focus on a wide number of considerations when securing the wide spectrum of systems, devices and components. Not only must they protec... 2 years ago | 59 mins 在系統實施中無縫轉移至PCIe® 5.0技術 Liang Liu, Astera Labs 運算密集型工作負載（如人工智慧、機器學習）受到企業和雲端資料中心廣泛採用，需要透過高速、低延遲的互連架構如PCI Express®（PCIe®）連接高效能、專用節點。從PCIe 4.0升級至PCIe 5.0技術將頻寬從16GT/s增加一倍至32GT/s，但同時每單位距離的訊號衰減也更大，對訊號傳輸距... 2 years ago | 44 mins Seamless Transition to PCIe® 5.0 Technology in System Implementations Jonathan Bender, Casey Morrison and Pulkit Khandelwal, Astera Labs Compute-intensive workloads, such as Artificial Intelligence and Machine Learning, are being widely adopted in enterprise and cloud data centers, requ... 2 years ago | 58 mins Load more
